The 8A34002 System Synchronizer for IEEE 1588 generates ultra-low jitter; precision timing signals based on the IEEE 1588 Precision Time Protocol (PTP) and Synchronous Ethernet (SyncE). The device can be used as a single timing and synchronization source for a system or two of them can be used as a redundant pair for improved system reliability. Digitally Controlled Oscillators (DCOs) are available to be controlled by IEEE 1588 clock recovery servo software running on an external processor. The device supports physical layer timing with Digital PLLs (DPLLs) and other timing blocks necessary to implement a Synchronous Equipment Timing Source (SETS) for SyncE. The DCOs can be controlled using IEEE 1588 information alone, or they can combine IEEE 1588 time information with physical layer frequency information from SyncE in accordance with ITU-T G.8273.2. The device can be used to actively measure and compensate for clock propagation delays across backplanes and across circuit boards to ensure the distribution of accurate time and phase with minimal time error between IEEE 1588 Time Stamp Units (TSUs) in a system. The device supports multiple independent channels that control: IEEE 1588 clock synthesis; SyncE clock generation; jitter attenuation and universal frequency translation.  Input-to-input, input-to-output and output-to-output phase skew can all be precisely managed. The device outputs ultra-low-jitter clocks that can directly synchronize SERDES running at up to 28Gbps; as well as CPRI/OBSAI, SONET/SDH and PDH interfaces and IEEE 1588 TSUs.

To see other devices in this product family, visit the ClockMatrix Timing Solutions page.

Features

  • Four independent timing channels
  • Jitter output below 150fs RMS (typical)
  • Digital PLLs (DPLLs) lock to any frequency from 0.5Hz to 1GHz
  • DPLLs / Digitally Controlled Oscillators (DCOs) generate any frequency from 0.5Hz to 1GHz
  • DCO outputs can be aligned in phase and frequency with the outputs of any DPLL or DCO
  • DPLLs comply with ITU-T G.8262 for Synchronous Ethernet (SyncE)
  • IEEE 1588 Support:
    • DCOs can be controlled by external IEEE 1588 software to synthesize Precision Time Protocol (PTP) / IEEE 1588 clocks with frequency resolution less than 1.11x10-16
    • Combo Bus simplifies compliance with ITU-T G.8273.2
    • Precise (1ps) resolution for phase measurement and control
    • All outputs/inputs can be configured to decode/encode PWM clock signals
    • PWM can be used to transmit and receive embedded frame and sync pulses; as well as Time of Day (ToD) and other data
  • Device requires a crystal oscillator or fundamental-mode crystal: 25MHz to 54MHz
  • Optional XO_DPLL input allows a wider range for XO, TCXO or OCXO frequencies from 1MHz to 150MHz for applications that require a local oscillator with high stability
  • Serial processor ports support 1MHz I2C or 50MHz SPI

Product Options

注文可能な製品ID Part Status Pkg. Code Temp. Range Carrier Type 購入/サンプル
8A34002C-000NLG Active NLG72P4 -40 to 85°C Tray
Availability
8A34002C-000NLG8 Active NLG72P4 -40 to 85°C Reel
Availability
8A34002C-000NLG# Active NLG72P4 -40 to 85°C Reel
Availability
8A34002PC-000NLG Active NLG72P4 -40 to 85°C Tray
Availability
8A34002PC-000NLG8 Active NLG72P4 -40 to 85°C Reel
Availability
8A34002PC-000NLG# Active NLG72P4 -40 to 85°C Reel
Availability
8A34002B-000NLG Active NLG72P4 -40 to 85°C Tray
Availability
8A34002B-000NLG8 Active NLG72P4 -40 to 85°C Reel
Availability
8A34002B-000NLG# Active NLG72P4 -40 to 85°C Reel
Availability
8A34002PB-000NLG Active NLG72P4 -40 to 85°C Tray
Availability
8A34002PB-000NLG8 Active NLG72P4 -40 to 85°C Reel
Availability
8A34002PB-000NLG# Active NLG72P4 -40 to 85°C Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
8A3xxxx Family Errata (Rev B with Update v4.7) Errata PDF 127 KB
8A34002 Datasheet Datasheet PDF 1.39 MB
ユーザーガイド
ClockMatrix GUI Step-by-Step User Guide Guide PDF 4.98 MB
8A3xxxx Family Programming Guide (v4.7) Guide PDF 3.31 MB
アプリケーションノート、ホワイトペーパー
AN-1032 Time-of-Day Within an Ideal Chassis-Based System Application Note PDF 354 KB
AN-1034 Minimizing Backplane Signal Usage Application Note PDF 437 KB
AN-1031 Time Alignment Background in Wireless Infrastructure Application Note PDF 392 KB
AN-1033 Delay Variation Measurement and Compensation Application Note PDF 401 KB
AN-1020 ClockMatrix on nCXO Redundancy Application Note PDF 530 KB
AN-1010 ClockMatrix Time-to-Digital Converter Application Note PDF 1.54 MB
AN-950 82P338XX/9XX Usage of a SYNC Input for Clock Alignment Application Note PDF 175 KB
AN-807 Recommended Crystal Oscillators for NetSynchro WAN PLL Application Note PDF 77 KB
PCN / PDN
PCN#: TP1902-02 ROM Update for ClockMatrix Products Product Change Notice PDF 435 KB
その他資料
8A3x0xx Schematic Checklist (v1.22) Miscellaneous XLSX 328 KB
ClockMatrix Family Overview Overview PDF 241 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Radio Applications (日本語) English Product Brief PDF 2.34 MB
ClockMatrix 72-QFN (8 Output) Evaluation Board Schematic Schematic PDF 206 KB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB

ソフトウェア/ツール

タイトル 他の言語 タイプ 形式 サイズ 日付
Timing Commander Installer (v1.15.0.27471) Software ZIP 19.57 MB
Timing Commander Personality File for ClockMatrix 8A340xx (v7.5.0, FWv4.7.0) Software ZIP 34.52 MB
EEPROM_Image_PR4.7_Part=24xx1025_Address=0x50-0x54 Software ZIP 177 KB
EEPROM_Image_PR4.7_Part=24xx1024_Address=0x50-0x51 Software ZIP 177 KB
ClockMatrix Register Header Files v4.7 Software ZIP 293 KB
8A340x2 BSDL Model Model - BSDL BSDL 12 KB
8A340xx Clock Matrix IBIS Model Model - IBIS ZIP 2.40 MB