The 9DBL0242 device is a 3.3V member of IDT's Full-Featured PCIe family. The 9DBL0242 supports PCIe Gen1-4 Common Clocked (CC) and  PCIe Separate Reference Independent Spread (SRIS) systems. It offers an integrated output termination providing direct connection to 100Ω transmission lines. The 9DBL02P2 can be factory programmed with a user-defined power up default SMBus configuration.
 
For information regarding evaluation boards and material, please contact your local IDT sales representative.

Features

  • PCIe Gen1-2-3-4 CC compliant in ZDB mode
  • PCIe Gen2 SRIS compliant in ZDB mode
  • Supports PCIe Gen2-3 SRIS in fan-out mode
  • Supports PCIe SRnS clocking in ZDB or fan-out mode
  • Direct connection to 100Ω transmission lines; saves 8 resistors compared to standard PCIe devices
  • Spread Spectrum tolerant; allows reduction of EMI
  • Pin/SMBus selectable selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
  • Device contains default configuration; SMBus interface not required for device operation.
  • Easy AC-coupling to other logic families, see IDT application note AN-891.
  • Space saving 24-pin 4x4mm VFQFPN; minimal board space

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Output Impedance Carrier Type Buy Sample
9DBL0242BKILF Active NLG24P3 VFQFPN 24 I 100 Tray
Availability
9DBL0242BKILFT Active NLG24P3 VFQFPN 24 I 100 Reel
Availability

技術資料

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
データシート
9DBL0242_52 Datasheet Datasheet PDF 294 KB 2月 8, 2017
ユーザーガイド
Timing Products for NXP (Freescale) i.MX 简体中文 Guide PDF 321 KB 10月 31, 2018
アプリケーションノート、ホワイトペーパー
AN-975 Cascading PLLs Application Note PDF 128 KB 8月 2, 2017
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB 12月 10, 2015
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB 4月 7, 2015
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB 5月 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB 5月 11, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB 5月 10, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB 5月 7, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB 5月 6, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB 5月 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB 4月 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB 4月 23, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB 3月 11, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB 1月 14, 2014
その他資料
9DBL0242 EVB Reference Schematic Schematic PDF 71.36 MB 1月 30, 2019
Timing Solutions Products Overview Overview PDF 4.11 MB 10月 31, 2018
PCI Express® Timing Solutions Overview Overview PDF 301 KB 4月 19, 2018
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB 4月 28, 2016
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB 4月 24, 2016
ソフトウェア/ツール
9DBL02P2 IBIS Model Model - IBIS IBS 639 KB 10月 30, 2016

ソフトウェア/ツール

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
9DBL02P2 IBIS Model Model - IBIS IBS 639 KB 10月 30, 2016