The 9DBL0851 device is a 3.3V member of IDT's Full-Featured PCIe family. The 9DBL0851 supports PCIe Gen1-4 Common Clocked (CC) and  PCIe Separate Reference Independent Spread (SRIS) systems. It offers an integrated output termination providing direct connection to 85Ω transmission lines. The 9DBL08P1 can be factory programmed with a user-defined power up default SMBus configuration.

For information regarding evaluation boards and material, please contact your local IDT sales representative.

Features

  • PCIe Gen1-2-3-4 CC compliant in ZDB mode
  • PCIe Gen2 SRIS compliant in ZDB mode
  • Supports PCIe Gen2-3 SRIS in fan-out mode
  • Supports PCIe SRnS clocking in ZDB or fan-out mode
  • Direct connection to 85Ω transmission lines; saves 32 resistors compared to standard PCIe devices
  • Spread Spectrum tolerant; allows reduction of EMI
  • Pin/SMBus selectable selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
  • Device contains default configuration; SMBus interface not required for device operation.
  • Easy AC-coupling to other logic families, see IDT application note AN-891.
  • Space saving 48-pin 6x6mm VFQFPN; minimal board space

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Output Impedance Carrier Type 購入/サンプル
9DBL0851BKILF Active NDG48P2 VFQFPN 48 I 85 Tray
Availability
9DBL0851BKILFT Active NDG48P2 VFQFPN 48 I 85 Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
9DBL0841_51 Datasheet Datasheet PDF 334 KB
ユーザーガイド
Timing Products for NXP (Freescale) i.MX 简体中文 Guide PDF 321 KB
アプリケーションノート、ホワイトペーパー
AN-975 Cascading PLLs Application Note PDF 128 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-839 RMS Phase Jitter Application Note PDF 149 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCN / PDN
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB
9DBL08 Evaluation Board Schematic Schematic PDF 65 KB
PCI Express® Timing Solutions Overview Overview PDF 301 KB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB

ソフトウェア/ツール

タイトル 他の言語 タイプ 形式 サイズ 日付
9DBL0851B IBIS Model Model - IBIS ZIP 60 KB