The 9DBU0931 is a member of IDT's 1.5 V Ultra-Low-Power (ULP) PCIe family. The device has 5 output enables for clock management, and 3 selectable SMBus addresses.

Features

  • LP-HCSL outputs; save 18 resistors compared to standard HCSL outputs.
  • 47 mW typical power consumption in PLL mode; minimal power consumption
  • Separate power rail for LP-HCSL outputs can optionally be supplied from any voltage between 1.05 and 1.5 V; maximum power savings
  • OE# pin for each output; support DIF power management
  • HCSL differential input; can be driven by common clock sources
  • Spread spectrum tolerant; allows reduction of EMI
  • Programmable Slew rate for each output; allows tuning for various line lengths
  • Programmable output amplitude; allows tuning for various application environments
  • 1 MHz to 167 MHz operating frequency
  • Device contains default configuration; SMBus interface not required for device operation
  • 3.3 V tolerant SMBus interface  works with legacy controllers
  • Selectable SMBus addresses; multiple devices can easily share an SMBus segment
  • Space-saving 6x6 mm 48-pin VFQFPN; minimal board space

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9DBU0931AKILF Active NDG48P1 VFQFPN 48 I Yes Tray
Availability
9DBU0931AKILFT Active NDG48P1 VFQFPN 48 I Yes Reel
Availability
9DBU0931AKLF Active NDG48P1 VFQFPN 48 C Yes Tray
Availability
9DBU0931AKLFT Active NDG48P1 VFQFPN 48 C Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
データシート
9DBU0931 Datasheet Datasheet PDF 207 KB 3月 9, 2017
アプリケーションノート、ホワイトペーパー
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB 12月 10, 2015
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB 4月 7, 2015
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB 5月 12, 2014
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB 5月 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB 5月 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB 5月 7, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB 4月 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB 4月 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB 1月 14, 2014
PCN / PDN
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB 12月 19, 2016
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB 10月 21, 2015
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB 7月 20, 2015
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB 10月 31, 2018
PCI Express® Timing Solutions Overview Overview PDF 301 KB 4月 19, 2018
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB 4月 28, 2016
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB 4月 24, 2016
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB 2月 16, 2015
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB 8月 13, 2012