The 557-01 is a clock chip designed for use in PCI Express® Cards as a clock source. It provides a pair of differential outputs at 100 MHz in a small 8-pin SOIC package. Using IDT's patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces HCSL (Host Clock Signal Level) differential outputs at 100 MHz clock frequency. LVDS signal levels can also be supported via an alternative termination scheme.

Features

  • Supports PCI Express®TM HCSL Outputs 0.7 V current mode differential pair
  • Supports LVDS Output Levels
  • Packaged in 8-pin SOIC
  • RoHS 5 (green) or RoHS 6 (green and lead free) compliant packaging
  • Operating voltage of 3.3 V
  • Low power consumption
  • Input frequency of 25 MHz
  • Short term jitter 100 ps (peak-to-peak)
  • Output Enable via pin selection
  • Industrial temperature range available
  • For PCIe Gen2 applications, see the 5V41064
  • For PCIe Gen3 applications, see the 5V41234

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
557M-01LF Active DCG8 SOIC 8 C Yes Tube
Availability
557M-01LFT Active DCG8 SOIC 8 C Yes Reel
Availability
557MI-01LF Last Time Buy DCG8 SOIC 8 I Yes Tube
Availability
557MI-01LFT Last Time Buy DCG8 SOIC 8 I Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
データシート
557-01 Datasheet Datasheet PDF 115 KB 7月 24, 2012
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 229 KB 7月 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB 5月 12, 2014
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB 5月 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB 5月 11, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB 5月 10, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB 5月 7, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB 5月 6, 2014
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB 5月 6, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB 5月 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB 4月 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB 4月 23, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB 3月 11, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB 1月 14, 2014
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB 1月 14, 2014
PCN / PDN
PDN# : CQ-18-03 Product Discontinuance Notice Product Discontinuation Notice PDF 218 KB 4月 26, 2018
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB 4月 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB 2月 14, 2016
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB 10月 21, 2015
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB 7月 20, 2015
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB 10月 10, 2013
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB 3月 23, 2013
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB 12月 20, 2012
PCN# A-0607-06 MMT Thailand as Alternate Assembly Facility for PLCC, SOIC 150mil/300mil Product Change Notice PDF 223 KB 10月 5, 2006
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB 10月 31, 2018
PCI Express® Timing Solutions Overview Overview PDF 301 KB 4月 19, 2018
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB 4月 28, 2016
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB 4月 24, 2016
ソフトウェア/ツール
557-01 IBIS Model Model - IBIS ZIP 4 KB 3月 5, 2007

ソフトウェア/ツール

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
557-01 IBIS Model Model - IBIS ZIP 4 KB 3月 5, 2007