The 9FGV0241 is a 2-output very low power frequency generator for PCIe Gen1–4 applications with integrated output terminations providing Zo=100 Ω. The device has 2 output enables for clock management and supports 2 different spread spectrum levels in addtion to spread off.

Features

  • PCIe Gen1–4 compliant
  • Integrated terminations provide 100 Ω differential Zo: reduced component count and board space
  • 1.8 V operation: reduced power consumption
  • OE# pins: support DIF power management
  • LP-HCSL differential clock outputs: reduced power and board space
  • Programmable slew rate for each output: allows tuning for various line lengths
  • Programmable output amplitude: allows tuning for various application environments
  • DIF outputs blocked until PLL is locked: clean system start-up
  • Selectable 0%, -0.25% or -0.5% spread on DIF outputs: reduces EMI
  • External 25 MHz crystal; supports tight ppm with 0 ppm synthesis error
  • Configuration can be accomplished with strapping pins: SMBus interface not required for device control
  • 3.3 V tolerant SMBus interface works with legacy controllers
  • Space-saving 4x4 mm 24-pin VFQFPN; minimal board space

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9FGV0241AKILF Active NLG24P1 VFQFPN 24 I Yes Tube
Availability
9FGV0241AKILFT Active NLG24P1 VFQFPN 24 I Yes Reel
Availability
9FGV0241AKLF Active NLG24P1 VFQFPN 24 C Yes Tube
Availability
9FGV0241AKLFT Active NLG24P1 VFQFPN 24 C Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
データシート
9FGV0241 Datasheet Datasheet PDF 284 KB 6月 22, 2017
ユーザーガイド
Timing Products for NXP (Freescale) i.MX 简体中文 Guide PDF 321 KB 10月 31, 2018
アプリケーションノート、ホワイトペーパー
AN-975 Cascading PLLs Application Note PDF 128 KB 8月 2, 2017
AN-918 Programmable Clocks vs Crystal Oscillators Application Note PDF 221 KB 3月 9, 2016
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB 12月 10, 2015
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB 4月 7, 2015
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB 5月 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB 5月 11, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB 5月 10, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB 5月 7, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB 5月 6, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB 5月 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB 4月 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB 4月 23, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB 3月 11, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB 1月 14, 2014
PCN / PDN
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB 12月 19, 2016
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB 3月 23, 2013
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB 10月 31, 2018
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB 4月 28, 2016
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB 4月 24, 2016
9FGV0241 Reference Schematic Schematic PDF 27 KB 5月 1, 2015
ソフトウェア/ツール
9FGV0241 IBIS Model Model - IBIS ZIP 96 KB 12月 2, 2015

ソフトウェア/ツール

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
9FGV0241 IBIS Model Model - IBIS ZIP 96 KB 12月 2, 2015