The 9ZXL0451 is a second generation enhanced performance DB800ZL derivative for PCIe Gen4 and 5 applications. In fanout (bypass) mode, it is DB2000Q compatible. A fixed external feedback in ZDB mode maintains low drift for critical QPI/UPI.
 

Features

  • LP-HCSL outputs eliminate 16 resistors; save 32mm2 of area
  • 4 OE# pins; SMBus control also available
  • 3 selectable SMBus addresses
  • 2 selectable ZDB bandwidths; minimizes jitter peaking in cascaded PLL topologies
  • Hardware/SMBus control of ZDB bandwidth and fanout modes
  • Spread spectrum compatible
  • 100MHz ZDB mode
  • 5 × 5 mm 32-VFQFPN package; small board footprint

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
9ZXL0451EKILF Active NLG32 VFQFPN 32 I Yes Tray
Availability
9ZXL0451EKILFT Active NLG32 VFQFPN 32 I Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
9ZXL0451E Datasheet Datasheet PDF 298 KB
アプリケーションノート、ホワイトペーパー
AN-1001 Combining PhiClock™ and 9ZXL1951D for PCIe Gen4/5 Application Note PDF 103 KB
AN-975 Cascading PLLs Application Note PDF 128 KB
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB