NOTICE - The following device(s) are recommended alternatives:
9ZXL1550D - 15-Output DB1900ZL Low-Power Derivative
Pin-to-pin with improved performance
The 9ZXL1550 is a DB1900Z derivative buffer utilizing Low-Power HCSL (LP-HCSL) outputs to increase edge rates on long traces, reduce board space, and reduce power consumption more than 50% from the original 9ZX21501. It is pin-compatible to the 9ZXL1530 and has the output terminations integrated.It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback to maintain low drift for demanding QPI/UPI
applications.

Features

  • LP-HCSL outputs; up to 90% IO power reduction, better signal integrity over long traces
  • Direct connect to 85Ω transmission lines; eliminates 60 termination resistors, saves 103mm² area
  • Pin compatible to the 9ZXL1530; easy upgrade to reduced board space
  • 64-VFQFPN package; smallest 15 output Z-buffer
  • Fixed feedback path: ~ 0ps input-to-output delay
  • 9 Selectable SMBus addresses; multiple devices can share same SMBus segment
  • Separate VDDIO for outputs; allows maximum power savings
  • PLL or bypass mode; PLL can dejitter incoming clock
  • 100MHz & 133.33MHz PLL mode; legacy QPI/UPI support
  • Selectable PLL BW; minimizes jitter peaking in downstream PLL's
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • SMBus Interface; unused outputs can be disabled
  • 15 - LP-HCSL Differential Output Pairs w/integrated terminations (Zo = 85Ω)

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
9ZXL1550BKLF Active NLG64P2 VFQFPN 64 C Yes Tray
Availability
9ZXL1550BKLFT Active NLG64P2 VFQFPN 64 C Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
データシート
9ZXL1550 Datasheet Datasheet PDF 295 KB 11月 20, 2015
アプリケーションノート、ホワイトペーパー
AN-975 Cascading PLLs Application Note PDF 128 KB 8月 2, 2017
AN-828 Termination - LVPECL Application Note PDF 229 KB 7月 5, 2016
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB 12月 10, 2015
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB 5月 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB 5月 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB 5月 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB 5月 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB 4月 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB 4月 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB 1月 14, 2014
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB 1月 14, 2014
PCN / PDN
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB 12月 19, 2016
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB 10月 21, 2015
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB 7月 20, 2015
PCN# : A1311-03R1 Alternate Assembly Locations Product Change Notice PDF 43 KB 2月 15, 2014
PCN# : A1311-03 Alternate Assembly Locations Product Change Notice PDF 140 KB 12月 2, 2013
PCN# : A1305-01 Gold Wire to Copper Wire Product Change Notice PDF 148 KB 7月 28, 2013
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB 10月 31, 2018
PCI Express® Timing Solutions Overview Overview PDF 301 KB 4月 19, 2018
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB 4月 28, 2016
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB 4月 24, 2016
ソフトウェア/ツール
9ZXL1550 IBIS Model Model - IBIS ZIP 50 KB 8月 22, 2016

ソフトウェア/ツール

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
9ZXL1550 IBIS Model Model - IBIS ZIP 50 KB 8月 22, 2016