The 5PB1216 is a high-performance TCXO / LVCMOS clock fanout buffer with individual OE pin for each output. The CLKIN pin can accept either a square wave (LVCMOS) or clipped sine wave (such as TCXO clipped sine wave output) as input.

The 5PB1216 has industry-leading low jitter and extremely low current consumption, making it ideal for smart mobile devices.

Features

  • Extremely low operating and standby current consumption
  • Low RMS Additive Phase jitter
  • 2.5 V to 3.3 V power supply voltage
  • Six outputs with individual Output Enable pin
  • One input
  • OE_OSC control pin to enable/disable reference TCXO / XO
  • Small 20-pin VFQFPN package
  • Extended temperature range (-40°C to +105°C) 

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
5PB1216NDGK Active NDG20P2 VFQFPN 20 K Yes Tray
Availability
5PB1216NDGK8 Active NDG20P2 VFQFPN 20 K Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
5PB12xx Datasheet Datasheet PDF 297 KB
アプリケーションノート、ホワイトペーパー
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN# : A1711-01 Add ASECL as Alternate Assembly for Select Devices Product Change Notice PDF 30 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Ultra-Low-Jitter Single-Ended Buffer Family Overview Overview PDF 252 KB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB