The 8S89874I is a high speed 1:2 Differential-to- LVPECL Buffer/ Divider. The 8S89874I has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider, which allows the device to be used as either a 1:2 fanout buffer or frequency divider. The clock input has internal termination resistors, allowing it to interface with several differential signal types while minimizing the number of required external components. The device is packaged in a small, 3mm x 3mm VFQFN package, making it ideal for use on space-constrained boards.

Features

  • Two LVPECL/ECL output pairs
  • Frequency divide select options: ÷1 (pass through), ÷2, ÷4, ÷8, ÷16
  • IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML
  • Output frequency: 2GHz (maximum)
  • Output skew: 15ps (maximum)
  • Part-to-part skew: 250ps (maximum)
  • Additive phase jitter, RMS: 0.20ps (typical)
  • LVPECL supply voltage range: 2.375V to 3.63V
  • ECL supply voltage range: -3.63V to -2.375V
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
8S89874BKILF Active NLG16P2 VFQFPN 16 I Yes Tube
Availability
8S89874BKILF/W Active NLG16P2 VFQFPN 16 I Yes Reel
Availability
8S89874BKILFT Active NLG16P2 VFQFPN 16 I Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
8S89874 Datasheet Datasheet PDF 479 KB
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCN / PDN
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB

ソフトウェア/ツール

タイトル 他の言語 タイプ 形式 サイズ 日付
8S89874 IBIS Model Model - IBIS ZIP 76 KB