NOTICE - The following device(s) are recommended alternatives:

The MK2308-1H is a low phase noise, high-speed PLL based, 8-output, low skew zero delay buffer. Based on IDT's proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. For normal operation as a zero delay buffer, any output clock is tied to the FBIN pin. IDT manufactures a large variety of clock generators and buffers.

Features

  • Clock outputs from 10 to 133 MHz
  • Zero input-output delay
  • Eight low skew (<200 ps) outputs
  • Device-to-device skew <700 ps
  • Full CMOS outputs with 25 mA output drive capability at TTL levels
  • 5 V tolerant FBIN and CLKIN pins
  • Tri-state mode for board-level testing
  • Advanced, low-power, sub-micron CMOS process
  • Operating voltage of 3.3 V
  • Industrial temperature range available
  • Packaged in 16-pin SOIC and TSSOP packages
  • Pb (lead) free package
  • Industrial and commercial temp operation

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
MK2308G-1HILF Obsolete PGG16 TSSOP 16 I Yes Tube
Availability
MK2308G-1HILFTR Obsolete PGG16 TSSOP 16 I Yes Reel
Availability
MK2308G-1HLF Obsolete PGG16 TSSOP 16 C Yes Tube
Availability
MK2308G-1HLFTR Obsolete PGG16 TSSOP 16 C Yes Reel
Availability
MK2308S-1HLF Obsolete DCG16 SOIC 16 C Yes Tube
Availability
MK2308S-1HLFTR Obsolete DCG16 SOIC 16 C Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
MK2308-1H Datasheet Datasheet PDF 205 KB
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCN / PDN
PDN# : CQ-17-04(R1) Product Discontinuance Notice Product Discontinuation Notice PDF 606 KB
PDN# : CQ-17-04 Product Discontinuance Notice Product Discontinuation Notice PDF 599 KB
PDN# : CQ-16-01 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 552 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : TB1403-01 Changed in Carrier Tape, Plastic Reel and Quantity per Reel on TSSOP-14, TSSOP-16 Product Change Notice PDF 663 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB