NOTICE - The following device(s) are recommended alternatives:
The ADC1410S105HN is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at a sample rates of 105 Msps. Pipelined architecture and output error correction ensure the ADC1410S105HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Voltage Differential Signaling) DDR (Double Data Rate) output standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC. The device also includes a programmable gain amplifier with a flexible input voltage range.

Features

  • 14-bit pipelined ADC core
  • CMOS or LVDS DDR digital outputs
  • Duty cycle stabilizer
  • Fast OTR detection
  • Flexible input voltage range: 1 V to 2 V p-p with 6 dB programmable fine gain
  • INL &plusmn
  • 1 LSB, DNL &plusmn
  • 0.5 LSB (typical)
  • Input bandwidth, 600 MHz
  • Offset binary, 2's complement, gray code
  • Power dissipation, 387 at 80 Msps
  • Power-down and Sleep modes
  • Sample rate up to 105 Msps
  • SFDR, 90 dBc
  • Single 3 V supply
  • SNR, 73 dB
  • SPI Interface

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
ADC1410S105HN-C1 Obsolete NLG40 VFQFPN 40 I Yes Tray
Availability
ADC1410S105HN-C18 Obsolete NLG40 VFQFPN 40 I Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
ADC1410S SER Datasheet Datasheet PDF 534 KB

Evaluation Boards

Part Number Title 昇順で並び替え
ADC1410S105F2 ADC1410S105F2 demoboard; LVDS/DDR version;
ADC1410S105F1 ADC1410S105F1 Demo Board; CMOS version