The 5V41067A is a 2:4 differential clock mux for PCI Express applications. It has very low additive jitter making it suitable for use in PCIe Gen2 and Gen3 systems. The 5V41067A selects between 1 of 2 differential HCSL inputs to fanout to 4 differential HCSL output pairs. The outputs can also be terminated to LVDS.

Features

  • 4 – 0.7V current mode differential HCSL output pairs
  • Low additive jitter
  • suitable for use in PCIe Gen2 and Gen3 systems
  • 20-pin TSSOP package
  • small board footprint
  • Outputs can be terminated to LVDS
  • can drive a wider variety of devices
  • OE control pin
  • greater system power management
  • Industrial temperature range available
  • supports demanding embedded applications
  • Additive cycle-to-cycle jitter <5 ps
  • Additive phase jitter (PCIe Gen2/3) <0.2ps
  • Operating frequency up to 200MHz

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
5V41067APGG Active PGG20 TSSOP 20 C Yes Tube
Availability
5V41067APGG8 Active PGG20 TSSOP 20 C Yes Reel
Availability
5V41067APGGI Active PGG20 TSSOP 20 I Yes Tube
Availability
5V41067APGGI8 Active PGG20 TSSOP 20 I Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
データシート
5V41067A Datasheet Datasheet PDF 188 KB 6月 6, 2013
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 229 KB 7月 5, 2016
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB 5月 12, 2014
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB 5月 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB 5月 11, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB 5月 10, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB 5月 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB 5月 5, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB 5月 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB 4月 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB 4月 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB 1月 14, 2014
PCN / PDN
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB 4月 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB 2月 14, 2016
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB 1月 27, 2016
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB 11月 12, 2015
PCN# : TB1503-01R1 Carrier Tape Standardization for Selective Packages Product Change Notice PDF 333 KB 10月 21, 2015
PCN# : TB1503-01 Carrier Tape Standardization for Selective Packages Product Change Notice PDF 291 KB 7月 20, 2015
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB 10月 31, 2018
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB 4月 28, 2016
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB 4月 24, 2016
ソフトウェア/ツール
5V41067A IBIS Model Model - IBIS ZIP 6 KB 3月 7, 2013

ソフトウェア/ツール

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
5V41067A IBIS Model Model - IBIS ZIP 6 KB 3月 7, 2013