The 9DBL411 is a 4-Output lower power differential buffer. Each output has its own OE# pin. It has a maximum operating frequency of 150 MHz.

Features

  • 4 - low power differential output pairs
  • Individual OE# control of each output pair
  • Output cycle-cycle jitter < 25 ps additive
  • Output to output skew: < 50 ps
  • Low power differential fanout buffer for PCIExpress and CPU clocks
  • 20-pin MLF or TSSOP packaging

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9DBL411AGLF Active PGG20 TSSOP 20 C Yes Tube
Availability
9DBL411AGLFT Active PGG20 TSSOP 20 C Yes Reel
Availability
9DBL411AKLF Active NLG20P1 VFQFPN 20 C Yes Tube
Availability
9DBL411AKLFT Active NLG20P1 VFQFPN 20 C Yes Reel
Availability
9DBL411BGILF Active PGG20 TSSOP 20 I Yes Tube
Availability
9DBL411BGILFT Active PGG20 TSSOP 20 I Yes Reel
Availability
9DBL411BGLF Active PGG20 TSSOP 20 C Yes Tube
Availability
9DBL411BGLFT Active PGG20 TSSOP 20 C Yes Reel
Availability
9DBL411BKILF Active NLG20P1 VFQFPN 20 I Yes Tube
Availability
9DBL411BKILFT Active NLG20P1 VFQFPN 20 I Yes Reel
Availability
9DBL411BKLF Active NLG20P1 VFQFPN 20 C Yes Tube
Availability
9DBL411BKLFT Active NLG20P1 VFQFPN 20 C Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
データシート
9DBL411B Datasheet Datasheet PDF 84 KB 9月 25, 2018
9DBL411A Datasheet Datasheet PDF 79 KB 7月 1, 2012
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL Application Note PDF 229 KB 7月 5, 2016
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB 12月 10, 2015
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB 4月 7, 2015
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB 5月 12, 2014
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB 5月 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB 5月 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB 5月 7, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB 4月 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB 4月 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB 1月 14, 2014
PCN / PDN
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB 4月 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB 2月 14, 2016
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB 1月 27, 2016
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB 11月 12, 2015
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB 10月 21, 2015
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB 7月 20, 2015
PCN# : A1305-01 Gold Wire to Copper Wire Product Change Notice PDF 148 KB 7月 28, 2013
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB 3月 23, 2013
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB 10月 31, 2018
PCI Express® Timing Solutions Overview Overview PDF 301 KB 4月 19, 2018
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB 4月 28, 2016
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB 4月 24, 2016
ソフトウェア/ツール
9DBL411B IBIS Model Model - IBIS ZIP 7 KB 3月 8, 2012
9DBL411A IBIS Model - IBIS ZIP 7 KB 3月 20, 2009

ソフトウェア/ツール

タイトル 他の言語 タイプ フォーマット ファイルサイズ 日付
9DBL411B IBIS Model Model - IBIS ZIP 7 KB 3月 8, 2012
9DBL411A IBIS Model - IBIS ZIP 7 KB 3月 20, 2009