The 9ZXL1951D is a second-generation, enhanced performance DB1900ZL derivative buffer. The part is a pin-compatible upgrade to the 9ZXL1951A, offering a much improved phase jitter performance. It has 8 OE# pins that can be configured via SMBus to control up to 16 of the device's 19 outputs, and is packaged in a 6 x 6 mm QFN package for maximum space savings. A fixed external feedback maintains low drift for critical QPI/UPI applications.

Features

  • LP-HCSL outputs with 85Ω Zout; eliminates 76 termination resistors, saves 130mm² area
  • 8 OE# pins configurable to control up to 16 outputs; easy power management
  • 9 selectable SMBus addresses; multiple devices can share same SMBus segment
  • Selectable PLL BW; minimizes jitter peaking in cascaded PLL topologies
  • Hardware/SMBus control of PLL bandwidth and bypass; change mode without power cycle
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • 100MHz PLL mode; UPI support
  • DIF input and DIF outputs on outer row of pins; easy board routing
  • 6 x 6 mm dual-row 80-GQFN; smallest 19-output Z-buffer

Product Options

注文可能な製品ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
9ZXL1951DNHGI Active NHG80 VFQFPN 80 I Yes Tray
Availability
9ZXL1951DNHGI8 Active NHG80 VFQFPN 80 I Yes Reel
Availability

技術資料

タイトル 他の言語 タイプ 形式 サイズ 日付
データシート
9ZXL1951D Datasheet Datasheet PDF 326 KB
アプリケーションノート、ホワイトペーパー
AN-1001 Combining PhiClock™ and 9ZXL1951D for PCIe Gen4/5 Application Note PDF 103 KB
AN-975 Cascading PLLs Application Note PDF 128 KB
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB
その他資料
Timing Solutions Products Overview Overview PDF 4.11 MB
PCI Express® Timing Solutions Overview Overview PDF 301 KB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB

ソフトウェア/ツール

タイトル 他の言語 タイプ 形式 サイズ 日付
9ZXL1951D IBIS Model Model - IBIS ZIP 25 KB

Evaluation Boards

Part Number Title 昇順で並び替え
EVK9ZXL1951D Evaluation Kit for 19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI